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Design >> Mixed-Signal Design >> bandgap dc analysis and tran analysis
https://designers-guide.org/forum/YaBB.pl?num=1485147756

Message started by A.D.J on Jan 22^nd, 2017, 9:02pm

Title: bandgap dc analysis and tran analysis
Post by A.D.J on Jan 22^nd, 2017, 9:02pm

Hi, everyone.
Recently I designed a resistorless bandgap. In the DC analysis, it works good enough.
But when I simulate the Tran analysis, no matter how long it is, the reference voltage will be unstable in the final simulation time in 100ns period. But the value is very small.
I don't know why.
Thank you.

PS: is this simulator issue?

Title: Re: bandgap dc analysis and tran analysis
Post by ULPAnalog on Jan 23^rd, 2017, 1:04am

Quote:

But when I simulate the Tran analysis, no matter how long it is, the reference voltage will be unstable in the final simulation time in 100ns period. But the value is very small.

Could you explain this in more detail as I do not completely follow it. Are you saying that bandgap is unstable in tran simulation, no matter what and the output of BGR is small?

In general, DC analysis tries to find an equilibrium point and it is not necessary that the equilibrium is a stable one. In a transient analysis, the simulator perturbs the system by moving it away from the equilibrium point. If the circuit is stable, it will return back to its equilibrium position. Going by what I understood from your post, it appears that the BGR is indeed unstable. I do not know which simulator was used to simulate this particular circuit, but I would be hard pressed to believe that it is a simulator issue.

For more details, you might be interested in taking a look at http://kenkundert.com/docs/bctm98-MSsim.pdf pg 5 in particular.

Thanks and regards

Title: Re: bandgap dc analysis and tran analysis
Post by A.D.J on Jan 23^rd, 2017, 7:01am

This is the simulation result for 500ns tran analysis.

Title: Re: bandgap dc analysis and tran analysis
Post by A.D.J on Jan 23^rd, 2017, 7:02am

This is for 1us tran analysis

Title: Re: bandgap dc analysis and tran analysis
Post by ULPAnalog on Jan 24^th, 2017, 1:40am

It is hard to say what might be going on without looking at the schematics of the BGR. If you have not tried already, I would suggest you to try ramping up the supply from 0 to Vdd and see if the BGR remains stable. How does the behavior look like after a long time, say 100 us. Does it stabilize or continues to exhibit oscillations?

Title: Re: bandgap dc analysis and tran analysis
Post by A.D.J on Feb 20^th, 2017, 2:45pm

Thank you. You are right.
People used to use ramp to test the startup time for BGR.