The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> Compensation in frequency locked loop
https://designers-guide.org/forum/YaBB.pl?num=1489136865

Message started by deba on Mar 10^th, 2017, 1:07am

Title: Compensation in frequency locked loop
Post by deba on Mar 10^th, 2017, 1:07am

Hi All,

In the attached frequency locked loop, why is there a need of compensation network formed by Rz,Cz, and Cc? As far as I see there is only one integrator in the closed loop, the OTA. The oscillator from vctrl to output frequency is just a gain block since the output variable of interest is just frequency. Single integrator loops are inherently stable, so why is there a need of compensation?

Is there some small signal modelling which I am missing?

Thanks