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Other CAD Tools >> Physical Verification, Extraction and Analysis >> cmos active inductor......
https://designers-guide.org/forum/YaBB.pl?num=1490211103

Message started by ofaruqe20 on Mar 22^nd, 2017, 12:31pm

Title: cmos active inductor......
Post by ofaruqe20 on Mar 22^nd, 2017, 12:31pm

sir, plz help me.... i am facing a trouble for the simulation of active inductor in cadence....my q factor graph is continuously increasing straight line ...which is not the expected graph...i am preparing thesis on this topic.....but i cannot complete it.....plz help me...

Title: Re: cmos active inductor......
Post by Andrew Beckett on Mar 25^th, 2017, 2:31am

You'll need to provide some context. This is the kind of information you'll need to provide to allow anyone to help:

What does the circuit look like that you're analysing (pictures or even better a netlist would be good)
You posted this in the physical verification and extraction forum, so what tool are you using to extract the circuit?
What simulator and version are you using?
How are you simulating this? What analysis, what setup?
What do the results look like that you think are problematic?

Your question as it stands is too lacking in detail to be able to answer, other than me suggesting you speak to your supervisor...

Andrew.