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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> Resources usage https://designers-guide.org/forum/YaBB.pl?num=1494887351 Message started by Abdullah on May 15th, 2017, 3:29pm |
Title: Resources usage Post by Abdullah on May 15th, 2017, 3:29pm Hi all, Is there a way to estimate the resources usage for a particular module written in Verilog-AMS? I'm using Cadence. Thanks, Note: Admin would you please move this topic to Verilog-AMS section. I placed it here by mistake. |
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