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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> SAR ADC C-DAC noise analysis https://designers-guide.org/forum/YaBB.pl?num=1501009592 Message started by neoflash on Jul 25th, 2017, 12:06pm |
Title: SAR ADC C-DAC noise analysis Post by neoflash on Jul 25th, 2017, 12:06pm In approximation phase, CDAC output noise is directly sampled by the slicer. For reference noise to CDAC output, the analysis is relatively easy since the noise is very band limited. However, the CDAC switches noise is not band limited by C-DAC capacitance, however, it is band limited only by parasitic capacitances and comparator. Is there any article analyzing the switch noise? How to calculate the effective bandwidth for thermal noise integration? |
Title: Re: SAR ADC C-DAC noise analysis Post by DanielLam on Jul 25th, 2017, 5:27pm Refer to this post about SAR ADC noise. http://www.designers-guide.org/Forum/YaBB.pl?num=1488480308 |
Title: Re: SAR ADC C-DAC noise analysis Post by neoflash on Jul 26th, 2017, 6:16pm It helps. Thanks. DanielLam wrote on Jul 25th, 2017, 5:27pm:
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