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Design >> Analog Design >> Varactor Simulation
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Message started by umberabbas on Nov 19th, 2017, 8:13pm

Title: Varactor Simulation
Post by umberabbas on Nov 19th, 2017, 8:13pm

I want to use varactors for a VCO. However, I don't know how to simulate it first to see the characteristics.
I have a confusion as to how to differentiate between these two:
(1) Do I have to make the transistor as the varactor? How to see if the designed varactor is in that particular region (depletion, accumulation, inversion) and how to calculate the capacitance (max, min)?

(2) There are some RF varactors available in the foundry (nvrac and pvrac) should I use them? If I use them how can i calculate the maximum and minimum capacitance through finger width, length of fingers, no: of fingers in X and Y and multiplier? How can I simulate them? which analysis should be used.

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