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Simulators >> Circuit Simulators >> Discrepancy between liberal and moderate in the simulation of a SC delta sigma
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Message started by polyam on Dec 24^th, 2017, 5:55pm

Title: Discrepancy between liberal and moderate in the simulation of a SC delta sigma
Post by polyam on Dec 24^th, 2017, 5:55pm

Hi,

I am trying to simulate a 2nd order SC delta-sigma modulator. Whole blocks are implemented through either macro-models or Verilog-A modules. Specifically, OTAs are modeled with macro models and switches are the Verilog-A modules. The sampling frequency is fs= 5.12 MHz and BW=20MHz. 1ms simulation is carried out to get 4096 points. I've also set strobe period and strobe delay to Ts=1/fs and Ts/2-epsilon, respectively.

When I use the liberal mode, I get what I expect BUT when I switch to moderate mode the performance goes down and I cannot figure out what the reason is. :o
Please check out both PSDs in liberal and moderate modes.

Thanks

Title: Re: discrepancy between liberal and moderate in the simulation of a SC delta sigma
Post by polyam on Dec 24^th, 2017, 5:55pm

PSD moderate

Title: Re: Discrepancy between liberal and moderate in the simulation of a SC delta sigma
Post by sheldon on Dec 27^th, 2017, 10:10am

Polyam,

These results are the FFT results, not the PSD. You will need to use a
different simulation setup, run longer simulation, and use a different
measurement to perform a PSD.

These results are expected and correct. The moderate error preset
has higher simulation accuracy tolerances than the liberal error preset.
The moderate error preset results are showing the noise shaping of the
quantization noise.

Try running a 16,384 point FFT with the moderate error preset. In
that case, the quantization noise floor should be ~6dB lower for the
16384 point FFT.

Sheldon