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Design >> Analog Design >> Fully Differential Amplifier MISMATCH analysis
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Message started by Ankit on Apr 17^th, 2018, 2:56am

Title: Fully Differential Amplifier MISMATCH analysis
Post by Ankit on Apr 17^th, 2018, 2:56am

Hi all,

I am designing two stage fully differential amplifier. Both stage are CMFB compensated. My problem is that after first stage only there is so much offset in output of first stage (because of mismatch) Second stage ouputs are going to vdd and ground.

Is there any solution to it.

Please find the ckt image attached.

Waiting for reply urgently.

Thanks,
Amit

Title: Re: Fully Differential Amplifier MISMATCH analysis
Post by R.kumar on Apr 23^rd, 2018, 7:54am

What is the gain of this cascaded amplifier? It could be that the gain is large enough to cause the output to rail. Since you have two dominant poles you must be careful with the stability of this amplifier.

Title: Re: Fully Differential Amplifier MISMATCH analysis
Post by R.kumar on Apr 23^rd, 2018, 7:59am

Also the 2nd stage is not a differential amplifier. It acts as a common mode amplifier. Additionally, since you have alternating NMOS and PMOS input stages, check if the output common mode of 1st Op-amp is enough to keep the 2nd stage input MOSFET in saturation. This may not be relevant to your question.

Title: Re: Fully Differential Amplifier MISMATCH analysis
Post by rajasekhar on May 13^th, 2018, 9:35pm

Hi-
WHat are you simulating here, i guess you are running open loop sim. Since it is a high gain amplifier, it is intended to use in close loop so kindly connect in Unity gain mode and check please!

Title: Re: Fully Differential Amplifier MISMATCH analysis
Post by vroy_92 on Jun 1^st, 2018, 3:25am

kumar.g wrote on Apr 23^rd, 2018, 7:59am:

Also the 2nd stage is not a differential amplifier. It acts as a common mode amplifier.

Agreed that it is a pseudo differential stage and will have common mode gain, but by the use of the CMFB, won't the common mode be fixed to what the input to the second stage CMFB amplifier is?

Title: Re: Fully Differential Amplifier MISMATCH analysis
Post by vroy_92 on Jun 1^st, 2018, 3:31am

Is the input pair dominating the mismatch? Then its easy to fix (blow up area of the transistor/increase the gain).

But why is your second CMFB designed with the resistor cancellation network?