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Design >> RF Design >> how to make lee's charge pump which is for pll to be stable？
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Message started by lwzunique on Sep 24^th, 2018, 4:15am

Title: how to make lee's charge pump which is for pll to be stable？
Post by lwzunique on Sep 24^th, 2018, 4:15am

Hi,everyone!

I want to design a charge pump for PLL based on lee's structure with is shown below.[img][/img]
when doing simulation, I found it's very difficult to make this feedback loop to be stable.

question:
1.how to simulate the stability? as I know loop filter should be added, and Vcm of should also added but with big inductor, for example, 1TH to block ac signal. so is this correct?
2. should we make the positive loop's current and negative loop's current the same? other papers related said in their design, positive loop's current and negative loop's current are the same.
3.I made both loop's current the same, removed the loop filter and using vdc combined with big inductor as Vcm，as in the picture， but the loop gain is not zero, in my mind, this situation, positive and negative
are the same and they can cancel each other, but stb simulation show the the loop gain is 25dB,why?
4.what about the error amp's characters? GBW should be 5~10 times of the pll's loop width? and the gain should be as large as possible?
5.in real design, is RC compensation always needed?
6.is this structure preferred in practice?

Thanks!