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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> RF Inductor Layout https://designers-guide.org/forum/YaBB.pl?num=1550285780 Message started by MWJ1975 on Feb 15th, 2019, 6:56pm |
Title: RF Inductor Layout Post by MWJ1975 on Feb 15th, 2019, 6:56pm Hi, I am currently doing a layout for an RF 2.4GHz receiver in GF 130nm CMOS technology using Cadence Virtuoso. I have begun planning my layout and I have some general questions regarding the inductors. I have two single-ended inductors about 18nH (pretty large area, an outer diameter of 300um for both of them) which are connected to a cross-coupled CMOS pair to form the differential LC oscillator. There is also a varactor across the pair for frequency tuning. I am trying to determine a reasonable space between the inductors and the varactor/nfets. In the training document, the only information I found was the spacing between the bond pads and the inductor. Reading Alan Hastings book I couldn't really find any information on this. The inductors are at the highest metal levels (MA, E1). Could anyone help assist with the following questions: 1) Related material for inductor layout 2) General spacing and area rules besides the DRC Thank you. |
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