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Measurements >> Phase Noise and Jitter Measurements >> divider pm jitter measurement example?
https://designers-guide.org/forum/YaBB.pl?num=1564498686

Message started by newmedia on Jul 30^th, 2019, 7:58am

Title: divider pm jitter measurement example?
Post by newmedia on Jul 30^th, 2019, 7:58am

Hello,

I'm pretty sure the same question is asked here already, but I cannot find the thread. Please excuse me to repeat a newbie question here.

I am hoping to see an actual example of divider jitter extraction from the real circuit. (or just description with a netlist.) If you are aware of any tutorial or application notes, please let me know. (Maybe Cadence has application notes?)

Thanks!

Title: Re: divider pm jitter measurement example?
Post by Ken Kundert on Jul 30^th, 2019, 3:40pm

Predicting the phase noise and jitter of PLL-based frequency synthesizers

Title: Re: divider pm jitter measurement example?
Post by newmedia on Aug 6^th, 2019, 2:14pm

Thank you Ken!

I found an circuit example from the one of the Cadence Rapid Adaption Kit.
I will try to use that circuit to understand your paper better.