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Design >> Analog Design >> 100 MHz oscillator on ~0.18um CMOS
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Message started by AnalogDE on Apr 1st, 2020, 9:57pm

Title: 100 MHz oscillator on ~0.18um CMOS
Post by AnalogDE on Apr 1st, 2020, 9:57pm
Can someone suggest a good architecture for a ~100MHz oscillator?
I need good PVT performance (~ +/- 10% period variation)

Title: Re: 100 MHz oscillator on ~0.18um CMOS
Post by Horror Vacui on Apr 3rd, 2020, 5:30pm
It is a tough question. I assume of course, that you are looking for a fully integrated architecture without off-chip crystal or resonator.

I see the problem in capacitance variations. All oscillators I am aware of utilize capacitance to determine the oscillation frequency, and on-chip - but even off-chip - capacitors tend to be inaccurate in absolute terms. In order to calibrate it, one need either capacitance or timing reference.

The standard low frequency oscillator topologies are current starved ring and relaxational oscillator, where a cap is charged to a threshold and then discharged.

If you find any good architecture, please share it here.

Title: Re: 100 MHz oscillator on ~0.18um CMOS
Post by AnalogDE on Apr 4th, 2020, 9:48am
Yes I'm looking for a fully integrated solution.

I am able to trim out capacitance variation.  I also have a bandgap VREF available as well as a low tempco IREF.  

I have done a relaxation oscillator that went about 10MHz using a relaxation oscillator before, but I'm having doubts about the same architecture working 10x faster.


Horror Vacui wrote on Apr 3rd, 2020, 5:30pm:
It is a tough question. I assume of course, that you are looking for a fully integrated architecture without off-chip crystal or resonator.

I see the problem in capacitance variations. All oscillators I am aware of utilize capacitance to determine the oscillation frequency, and on-chip - but even off-chip - capacitors tend to be inaccurate in absolute terms. In order to calibrate it, one need either capacitance or timing reference.

The standard low frequency oscillator topologies are current starved ring and relaxational oscillator, where a cap is charged to a threshold and then discharged.

If you find any good architecture, please share it here.


Title: Re: 100 MHz oscillator on ~0.18um CMOS
Post by Horror Vacui on Apr 4th, 2020, 7:34pm
How do you have a low tempco on-chip IREF? Does the chip have an off-chip resistor? The on-chip resistors are famous for their big variation.

How can you trim out the capacitor variations? The two basic ways to measure a capacitance which pops into my mind rely on a time reference in one way or other.

Don't you have on-chip a crystal oscillator, what you could use for calibration? Is it a purely analog chip, without digital logic?

Title: Re: 100 MHz oscillator on ~0.18um CMOS
Post by dnw on Oct 25th, 2020, 8:46pm
were you able to figure this out.
I am interested in knowing what kind of architecture you ended up with if you could share.

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