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Measurements >> Phase Noise and Jitter Measurements >> jitter measurement for phase domain model PLL
https://designers-guide.org/forum/YaBB.pl?num=1597853375

Message started by rezarmzn on Aug 19^th, 2020, 9:09am

Title: jitter measurement for phase domain model PLL
Post by rezarmzn on Aug 19^th, 2020, 9:09am

Hi,
Following your guide-line (Predicting the Phase Noise of PLL-Based Frequency Synthesizers) we have created the phase domain model for our PLL. Those models require a certain parameters (fcorner, white_noise_spd, ...) to be measured on the real circuit and be used here. the question is when running the simulation (either noise or pnoise) to measure these parameters what frequency range we should integrate it for?

e.g. we have frequency divider (VCO frequency is 16GHz, 16G / 8 = 2G) and the bandwidth of the PLL is roughly 20MHz. The input reference frequency is 2GHz. How to measure fcorner and white_noise_spd.
Thanks,

Title: Re: jitter measurement for phase domain model PLL
Post by Ken Kundert on Aug 19^th, 2020, 4:22pm

The divider model takes the power spectral density as a parameter, so you do not integrate the noise before applying it to the model. Just measure the strobed noise in terms of phase, split into flicker and white regions, give frequency that partitions the two regions as the corner frequency fc and give the power spectral density of the white region as n.

-Ken

Title: Re: jitter measurement for phase domain model PLL
Post by rezarmzn on Aug 20^th, 2020, 10:08am

Is there any particular function in the Cadence which can calculate corner frequency? Or should I post-process the data?

Title: Re: jitter measurement for phase domain model PLL
Post by Ken Kundert on Aug 20^th, 2020, 10:47am

I don't know. I am not that familiar with the calculator. Conceptually the flicker noise has a -10dB/dec slope and the white noise is flat. The corner frequency is where the asymptotes for these two regions intersect.

-Ken