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Measurements >> Phase Noise and Jitter Measurements >> Confusion with the terminology "RMS jitter" in papers. Is it Jc or Jee?
https://designers-guide.org/forum/YaBB.pl?num=1601481739

Message started by seriuswhite on Sep 30^th, 2020, 9:02am

Title: Confusion with the terminology "RMS jitter" in papers. Is it Jc or Jee?
Post by seriuswhite on Sep 30^th, 2020, 9:02am

Greetings,
While doing literature survey [1] and [2], I found that the authors have used the word "rms jitter" to report their jitter numbers. I am confused whether they mean cycle jitter (Jc) or edge-to-edge jitter (Jee) since both of them are jitter and are rms quantities.
Could you please tell me which jitter are they refering to?

P.S. I know what each term mean.

[1] A. Elkholy et al., "15.4 A 20-to-1000MHz ±14ps peak-to-peak jitter reconfigurable multi-output all-digital clock generator using open-loop fractional dividers in 65nm CMOS," 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)

[2] S. Hung and S. Pamarti, "6.4 A 0.5-to-2.5GHz Multi-Output Fractional Frequency Synthesizer with 90fs Jitter and -106dBc Spurious Tones Based on Digital Spur Cancellation," 2019 IEEE International Solid- State Circuits Conference