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Design >> Mixed-Signal Design >> open loop VCO-Based ADC
https://designers-guide.org/forum/YaBB.pl?num=1605281911

Message started by zahramoh on Nov 13^th, 2020, 7:38am

Title: open loop VCO-Based ADC
Post by zahramoh on Nov 13^th, 2020, 7:38am

Hi everybody
I have designed a 10-bit VCO-based ADC using an almost linear oscillator. I have two problems when I convert the digital output of the quantizer to analog.
First, the analog output for a sine input isn't good enough, as you can see in the attached figures.
Second, the noise floor of the output is almost high (NFtt = 500).
I was wondering if the nature of the quantizer is the reason for the above-mentioned issues?

Title: Re: open loop VCO-Based ADC
Post by zahramoh on Nov 13^th, 2020, 9:16am

BTW, you can see the block diagram of my structure in the following picture.

Title: Re: open loop VCO-Based ADC
Post by polyam on Nov 13^th, 2020, 6:45pm

Hi,

I believe linearity must be quantified rather than qualified. So I think SFDR is a good metric to evaluate the linearity. The other thing, you need 64 times of the OSR (rule of thumbs) to calculate your SNDR/SFDR etc. Are you getting about 66dB SNDR for your ADC?
Also, what is the bandwidth of your filter when you are low pass fileting with? Are you just filtering or you are decimation as well? What what is the BW of your VCO-based ADC? try to have a LPF with a 3dB roll off at the BW of your ADC and check to see if you still observe the distortion.

Title: Re: open loop VCO-Based ADC
Post by zahramoh on Nov 16^th, 2020, 8:03am

Thanks for your response. Your comments were so helpful. However, I have some questions.
The values of my design parameters are:
OSR = 8
BW = 1.5 MHz (BW = Fsampling/(2*OSR))
In the above BW, SNDR and SFDR are 45 dB and 49 dB, respectively. But, SNDR is 70 dB according to theoretical formula of SNDR (SNDR = 6.02*N + 1.73 + 10*log(OSR)). On the other hand, as you already said, SNDR is equal to 66 dB. Do you calculate the SNDR parameter from this formula?
I didn’t use low-pass and decimation filters, and I just applied a digital filter as a differentiator. Given that I measured the parameters of the system in the BW of ADC (1.5 MHz), I was wondering if those filters have any effect on the system parameters? If so, what kind of low-pass filter should I use? Do I have to apply it after the differentiator?
Thank you in advance for your time and consideration.

Title: Re: open loop VCO-Based ADC
Post by polyam on Nov 17^th, 2020, 9:53am

I am a bit confused about the SNDR you are getting. If you get 45dB SNDR it basically means that you are affected by the non-linearity of the VCO and it contradicts with your statement "almost linear oscillator".
The other thing is using a differentiator. I am assuming that you are using 1-Z^-1 (probably two stages) and that differentiator is essentially a high-pass filter. I would suggest you capture the data and then use a 2nd order decimation filter in Matlab and post-process the data. You need two accumulators, followed by a down-sampling factor of 8 and then two differentiators.
Also, increase the number of FFT point and plot your spectrum in log axis. That way you should be able to see 20dB/dec slop and HD2,HD3 ...

Title: Re: open loop VCO-Based ADC
Post by polyam on Nov 18^th, 2020, 1:16pm

A filter similar to what I attached should do the job.

Title: Re: open loop VCO-Based ADC
Post by zahramoh on Nov 19^th, 2020, 11:36am

I'm so thankful for your helpful comments. I will apply what you mentioned

Title: Re: open loop VCO-Based ADC
Post by zahramoh on Nov 20^th, 2020, 9:10am

I have used a decimation filter after the differentiator as you already mentioned, and the number of data decreased (exp: 1024 data were converted to 128 data by a 8 down sampler). So, I have some questions. Firstly, I was wondering if the sndr improves after the decimation filter? In other words, when I converted the digital data after the dicimation filter to analog signal, it was excelent, but I am not sure about the SNDR improvement.
Secondly, it is enough to use just a low pass filter without downsampling?

Title: Re: open loop VCO-Based ADC
Post by zahramoh on Nov 20^th, 2020, 9:22am

the following picture indicates the analog output without decimation filter (blue wave ) and with decimation filter (orange wave )

Title: Re: open loop VCO-Based ADC
Post by polyam on Nov 20^th, 2020, 2:08pm

It is always nice to upload clear plots with X/Y axis properly labeled. first I see the output is settling right at the beginning. Throw a couple of cycles away when you run fft on the output. So, run the sim for a couple of cycle more and run fft and see the SNDR.

zahramoh wrote on Nov 20^th, 2020, 9:22am:

the following picture indicates the analog output without decimation filter (blue wave ) and with decimation filter (orange wave )

Title: Re: open loop VCO-Based ADC
Post by polyam on Nov 20^th, 2020, 2:17pm

Think about noise shaping spectrum and the way you cut the noise power with the decimation filter. It will give you the answer on the SNDR improvement. Technically you can push the BW of your decimation filter towards the lower frequency and have a better SNDR. SNDR anyways is limited to the input thermal noise of your ADC and also probably the phase noise of your VCO. The other thing is you should not compare the output of your ADC with /without decimation filter. Technically speaking the output of your ADC is the output of the decimation filter and you have to compare it with your input. Note that in the oversampled noise shaping ADC, the whole package (modulator followed by the decimation filter) is called ADC.

I do not understand 'Secondly, it is enough to use just a low pass filter without downsampling?" If you are using the CIC filter it basically includes the down-sampling process. CIC stands for Cascaded Integrator-Comb and have look at its structure. The first order CIC is an accumulator followed by down sampler and a differentiator.

zahramoh wrote on Nov 20^th, 2020, 9:10am:

Title: Re: open loop VCO-Based ADC
Post by zahramoh on Dec 17^th, 2020, 2:50am

Thank you so much Polyam for your helpful response. I applied your advice, and I was able to solve the problems of the system. Now, I have a problem with the LUT (lookup table). In other words, I used this block to calibrate the problems which are derived from the nonlinearity of the RVCO. However, I do not know how to fill the LUT correctly.
Could you please help me if you have any information?