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Analog Verification >> Analog Functional Verification >> ADE L Stuck due to timescale definition
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Message started by Zaidi on Mar 24^th, 2023, 2:18pm

Title: ADE L Stuck due to timescale definition
Post by Zaidi on Mar 24^th, 2023, 2:18pm

Hi All,
I would like to ask about a particular situation when running a mixed mode simulation. I have an entire top level design where some blocks are schematic and others are models (SystemVerilog RNM).

I face an issue like simulation getting stuck when using Charge Pump circuit in schematic view. The simulation runs when I over write the timescale to 1 from the command line.

Why is it that the simulation runs properly when timescale is overwritten?

I run the ADE L from command line where Testbench and Models are in SystemVerilog.

Any clues on why this might be happening?

TIA

Title: Re: ADE L Stuck due to timescale definition
Post by Ken Kundert on Mar 24^th, 2023, 10:20pm

You are much more likely to get a quality response if you were to give specifics.

You cannot set the timescale to 1. The timescale requires two numbers, both of must end in s (for seconds).

However, I will try to help.

If you have a always block that looks like this:

Code:

always #d begin
...
end

the time cannot advance if d * timeunit < timeprec. So for example,

Code:

timescale 1ns/1ns

module ...

always #0.1 begin
...
end
endmodule

In this case the always block tries to wait by 100ps, but the minimum time resolution is 1ns, so the the advance in time is rounded down to the nearest ns, meaning that it rounds down to 0. This prevents time from advancing. It will keep cycling forever while time stays at 0. It is an infinite loop.

Title: Re: ADE L Stuck due to timescale definition
Post by Zaidi on Mar 27^th, 2023, 5:04am

Hi Ken,
Thank you very much for the detailed explanation.

My apologies, it was a typo on my part what I meant to say was that I set the `timescale to 1s/1ps from the command line.

The ADE L simulation had the timescale set to 1ns/1ns which perfectly fits the situation you explained.

Kind Regards,
Zaidi