I wrote an asynchr. comparator similar to the one in
http://www.designers-guide.org/Books/dg-vams/ch4/listing14.tar.gz; Code fragment:
logic CompOut;
electrical VCompIn;
parameter real Vhyst = 3.75e-3;
parameter real tpd = 25e-9;
always @(cross(VCompIn - Vhyst/2, +1, 1n, Vhyst/10.0))
CompOut <= #(tpd/1n) 1;
always @(cross(VCompIn + Vhyst/2, -1, 1n, Vhyst/10.0))
CompOut <= #(tpd/1n) 0;
I ran this with ncsim (AMS/spectre). The problem I have is that I loose events. First I get the warning
> Warning from spectre at time = 34.7478 ms during transient analysis `tran'.
> Analog events may be missing and simulation results may not be correct
> since time step was too big to catch the details in device/AHDL models.
> Use bound_step() or tighten simulation tolerance options to limit the
> time step.
At 70.2917608ms I clearly see a missing event which is not passed on to the digital simulator.
The signal VCompIn goes to -1 V and remains there for ca. 8 us, but CompOut remains at "1" all the time!
I can see no reason for the simulator not to catch the event - is my code poor or is this a simulator bug?