The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Dec 26th, 2024, 7:27pm
Pages: 1
Send Topic Print
fullly differential folded cascode OTA (Read 2375 times)
min
Junior Member
**
Offline



Posts: 16

fullly differential folded cascode OTA
Feb 20th, 2008, 10:26pm
 
Hi ,

I am designing a fully-differential folded cascode OTA. It is used in switch capacitor circuit. the load is only capacitor and CL1 = CL2=1200fF

the gain =  85 dB and bandwidth = 90MHz, but the phase margin is only 55 degree . How I can do to improve the phase margin ?

I have change the M7 and M8 size to improve phase margin , but improvement is so little . Can anyone help me?
Back to top
 

Image00081.JPG
View Profile   IP Logged
sheldon
Community Fellow
*****
Offline



Posts: 752

Re: fullly differential folded cascode OTA
Reply #1 - Feb 20th, 2008, 11:38pm
 
Min,

 Basically, there are only two devices in the signal path so there
is not a lot that can be done to improve the phase margin. Could
you provide any information about the bias and the device sizes?
Those are really the only variables available.

                                                          Best Regards,

                                                             Sheldon
Back to top
 
 
View Profile   IP Logged
safwatonline
Junior Member
**
Offline



Posts: 20

Re: fullly differential folded cascode OTA
Reply #2 - Feb 20th, 2008, 11:57pm
 
add some load capacitance (at the expense of some loss in GBW)
BTW i think 55 is a good enough number!   (if this is the worst case PM across all corners)
Back to top
 
 
View Profile   IP Logged
Berti
Community Fellow
*****
Offline



Posts: 356

Re: fullly differential folded cascode OTA
Reply #3 - Feb 21st, 2008, 5:20am
 
I think 55deg phase margin is at the (very) lower end for a SC-circuit. Such a phase-margin might be okay for a continuous-time circuit (or in a PLL loop).
But in a SC-circuit the input is basically a step and with only 55deg phase margin you will see ringing at the output, which is far from nice settling.

- To improve phase margin you can shift your dominant pole to lower frequencies as proposed by safwatonline.
- Or (the solution I would choose), redesign the amplifier to lower gain. Then the gain will cross the 0-dB at low frequency and phase margin is increased.
In this way you don't wast current and probably the system will still work with e.g. 75-dB gain.
- Or take a look at the transistors M3/4 to push the second pole to higher frequencies.

Regards

Back to top
 
 
View Profile   IP Logged
nobody
Community Member
***
Offline



Posts: 75

Re: fullly differential folded cascode OTA
Reply #4 - Feb 21st, 2008, 6:10am
 

I guess there are 2 ways or one way to improve the PM.
Try to increase the ft of cascode PMOS by reducing the length or width.
However, the decrease in length will reduce the gain.


Back to top
 
 
View Profile   IP Logged
HdrChopper
Community Fellow
*****
Offline



Posts: 493

Re: fullly differential folded cascode OTA
Reply #5 - Feb 21st, 2008, 4:51pm
 
I would go with Berti´s solution. If offset  is not a big concern, just reduce the input diff pair gm to lower the gain to get a better PM number.

Tosei
Back to top
 
 

Keep it simple
View Profile   IP Logged
min
Junior Member
**
Offline



Posts: 16

Re: fullly differential folded cascode OTA
Reply #6 - Feb 21st, 2008, 10:17pm
 
Hi ,

Thanks for your advices, and I have change the circuit and the phase margin = 70 degree and dc gain = 82dB

and I have another question :

1.  I simulate the ota total input referred noise is 8uV and I want to decrease this number. I increase the input differential pair M1 M2 gm and   the noise will decrease , but I don't know why , what is the reason ? and is there any other method to reduce the inpt referred noise ?

2.  Is the resistor in circuit lower the noise of avdd or lower noise of mosfet M3 & M4?

I see the main noise source is the input differential pair M1 M2.

Min
Back to top
 

Image00071.JPG
View Profile   IP Logged
nobody
Community Member
***
Offline



Posts: 75

Re: fullly differential folded cascode OTA
Reply #7 - Feb 22nd, 2008, 2:00am
 

Input referred noise is reduced by increasing the input gm because the other noises like current sources become less effective.

I think the resistor reduces the effective gm of M3,4 to reduce the noise sources from M3,4 because M3,4 act like source degeneration.
Back to top
 
 
View Profile   IP Logged
safwatonline
Junior Member
**
Offline



Posts: 20

Re: fullly differential folded cascode OTA
Reply #8 - Feb 22nd, 2008, 12:22pm
 
min wrote on Feb 21st, 2008, 10:17pm:
Hi ,

Thanks for your advices, and I have change the circuit and the phase margin = 70 degree and dc gain = 82dB

and I have another question :

1.  I simulate the ota total input referred noise is 8uV and I want to decrease this number. I increase the input differential pair M1 M2 gm and   the noise will decrease , but I don't know why , what is the reason ? and is there any other method to reduce the inpt referred noise ?

2.  Is the resistor in circuit lower the noise of avdd or lower noise of mosfet M3 & M4?

I see the main noise source is the input differential pair M1 M2.

Min

2- the resistors decrease the gm of M3 and M4 and hence decrease their contribution yet adding resistance will add some more noise (thermal noise)
also those resistors help in PSR+ as they increase the resistance between the output and Vdd
beside headroom issues when using resistors
Back to top
 
 
View Profile   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.