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which way to connect the current mirror (Read 4710 times)
surreyian
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which way to connect the current mirror
Jul 06th, 2012, 6:38am
 
hello,

How do we know which way is the correct connection?
Cirucuit A has the correct connection is the working circuit, can someone help me to understand why we have to connect this way.

here is my understanding.
in circuit B.  Break loop at A and inject a signal. If A increase then causing M1 to go Low, giving more current in M0 and M2. The negative feedback resistor R0 will reduc the over gain, hence over time, the circuit will stuck at zero. Is this understaning correct? Arent we interested to connect the circuit in negative feedback

But I;m not sure what makes circuit A works.
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BackerShu
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Re: which way to connect the current mirror
Reply #1 - Jul 18th, 2012, 9:15pm
 
My understanding,

Circuit A is correct which contain a positive feedback and a negative feedback.

Four transistors connected in A forms a positive feedback to generate current.

the resistor works as a source degeneration circuit, which is a negative feedback to make the whole current source stable.

Circuit B can't work as a current source.

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surreyian
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Re: which way to connect the current mirror
Reply #2 - Jul 22nd, 2012, 4:13am
 
why circuit B doesnt work? the 4 transistors still form a +ve feedback?
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avlsi
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Re: which way to connect the current mirror
Reply #3 - Jul 22nd, 2012, 6:22am
 
I had same question earlier and if you try to analyze with a small signal voltage as perturbation, both circuits seems to not work.
The best approach to analyze circuits with CCCS is to use a small signal current. Inject it any transistors drain and you will see that in circuit A, it doesnot affect the dynamics but in circuit B it affects as there is more positive feedback than negative feedback.
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surreyian
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Re: which way to connect the current mirror
Reply #4 - Jul 22nd, 2012, 12:21pm
 
alvsi,

i dont quite understand how current analysis work. can you help me understand?

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avlsi
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Re: which way to connect the current mirror
Reply #5 - Jul 22nd, 2012, 12:37pm
 
In both the circuits, there is a common part i.e., PMOS current mirror and the gain is 1.
In circuit A, current gain from M7 to M6 is gm6/gm7(1+gm6*R1). This is always < 1.
In Circuit B, current gain from M2 to M3 is gm2(1+gm2*R0)/gm3. This is always > 1.
So if there is any disturbance in current in nmos branches circuit A will suppress them but nmos branches in circuit B will go more positive and goto a dead zone.
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