MWJ1975
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Posts: 8
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Hi,
I was wondering if there is a method to generate a FSk signal in Cadence. Similar to how 'vsin' and 'vsource' can generate AM and FM signals from the analoglib library.
Looking online, I only saw one method which involved Verilog coding. Is there an easier technique to generate an FSK signal? I was able to generate an OOK signal using a 'vsin' and an ideal switch.
Using Virtuoso Analog Design Environment (ADE L). Thanks.
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