CDR
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Posts: 18
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Anybody has the model for D-Flip-flop with set and clear input? E.g, Set = 0; Q=1;Clr=0;Q=0;
Thanks,
module d_ff_set( vin_d, vclk, vout_q, vout_qbar, clr, set ); input vclk, vin_d,clr,set; output vout_q, vout_qbar; electrical vout_q, vout_qbar, vclk, vin_d,clr,set; parameter real vlogic_high = 5; parameter real vlogic_low = 0; parameter real vtrans_clk = 2.5; parameter real vtrans = 2.5; parameter real tdel = 3u from [0:inf); parameter real trise = 1u from (0:inf); parameter real tfall = 1u from (0:inf);
integer x; integer reset_state; analog begin @ (cross( V(set) - vtrans, -1 )) reset_state = 1; @ (cross( V(clr) - vtrans, -1 )) reset_state = 0; @ (cross( V(vclk) - vtrans_clk, +1 )) reset_state =3; if (reset_state==0) begin x =1; end else if (reset_state==3) begin x = (V(vin_d) > vtrans); end end V(vout_q) <+ transition( vlogic_high*x + vlogic_low*!x, tdel, trise, tfall ); V(vout_qbar) <+ transition( vlogic_high*!x + vlogic_low*x, tdel, trise, tfall ); end endmodule
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