Hi,
Im using ASSURA 3.1.4 (first time using Assura) and i can't get it to see my pins in the layout.

Super simple example: 1 nmos with 3 pins: gate, drain and bulk/source. When i do the DRC i get a Floating gate error (ERC) which with Diva was gone when i added the gate pin. When i do the LVS i get that the only difference are the pins since the layout view is extracted with 3 automatically generated names instead of my pin's names.

I have tried both kinds of pins: sym pin and shape pin and even plain labels, all in met1 layer both drawing and pin type, but nothing seems to work.

I have been through the drc.rul file from my foundry, and everything seems ok as far as i can tell (reading the assuracomandref.pdf). The extraction of the sym pins for example is made with the following line:
MET1_sympin = pinLayer( "MET1" type( "pin"))
which is then merged with other derived layers into net_met1 which is the layer used in the connection statements.

Probably i'm not giving enough information (there's so much), please tell me what else should i post to help you guys help me  ;)

Thank you very much,
PA

Ok, pinText did it. Thanks bernd!

At the end the problem was that the text information from the pins (and thus the name of the nets) was not beeing extracted. The rules file used the following line:
MET1_textpin = textToPin( "PIN" type("metal1"))
which only worked with labels on that specific layer (PIN:metal1). With pins it never worked, no matter in which layer did i put the pin label.

So i changed the line to:
MET1_textpin = pinText("MET1")
(in fact, i changed all metal and poly lines) and now both DRC and LVS work beautifully.

Regarding 'pinLayer', what i understand is that it defines the pin itself, no the net name information.

Best,
PA