The capacitance will be non-linear and frequency-dependent.  Most MOS models do not properly compute the frequency dependence of the capacitance, specifically in accumulation.  When there is an inversion layer, the charge can respond quickly.  Otherwise, the charge has to travel from the body and is quite slow.  The C-V curves for high and low frequency are generally presented in device physics books, as they are developing the theory of MOSFETs.

What I'm saying is: a spice simulation may not capture the correct C-V behavior.

Hi Geoffrey,
      How can i see frequency dependant MOS capacitance ( what simulation deck i should use) because i have done some AC analysis to find out capacitance based on series RLC circuit concept
 i have made known value of R and L inseires with MOS cap as shown earlier and impressed 1.2V DC as MOS operating voltage is 1.2 V (this is to ensure it operates in strong inversion region) and given AC magnitude of 1mV with wide range of freequency sweep , ther i observed Ipeak at some freequency and using this value i calculated the CAP = 1/[(2*pi*fc)**2 *L]

    is there any draw back of this procedure to know cap

as you mentioned MOS capacitance is freequncy dependant how will i get  Freq Vs Cap what kind of simulation i should do  

Achim,
   what is the intesion of you suggesting to do simulations at 1Hz is it because of i wanted DC Cap value?

hey one more thing i wanted help on SPICE/Spectre simulation to extract ESR value of MOS

   i thought of doing this in below methods but nothing did not work for MOS(active device)

1) VDD/Ileackage   (i know this si not currect and ended with wrong results )
2) added a known R value inseries with MOS cap configuration and given A DC of 1.2V and did transient analysis to plot V(N1) or V(N2) none of them are rising or falling instead 0sec it already reached steady state value

 do you people have any better idea of extracting ESR of semiconductor device (MOS) if so please let me know it really helps me lot


thanks
Kiran

kiran123 wrote on Sep 11^th, 2006, 9:53pm:


I just did a sim using some 0.18u models (BSIM4), sweeping VG (all other terminals grounded) and plotting the imaginary current into the gate (divided by 2*pi*f).  Regardless of the ac analysis frequency (1 or 1e9), the curve matches the "low frequency" mos capacitor curve from my textbook: it is (close to) COX for at both ends of the sweep, dropping down in the middle near the threshold voltage.

In order to see the real high-frequency behavior, one must use a non-quasi-static MOS model.  I tried setting ACNQSMOD=1 in my .model card, but it didn't give me a result I believed.


Quote:


Sorry, I'm not familiar with the acronym ESR.

Hi Kiran,

you method described will be quite inaccurate. In order to see the resistive part just plot 1/real(I) after the above AC simulation, remember the complex resistivity of an RC combination is Z = R + 1/(j*omega*C). But I am not sure whether the value you get will have any relation to reality neither that you measure any resistive part at all. But have a try.

In order to get the desired voltage rise you need either to set an initial condition for the voltage across the capacitor or to use an pulse source (vpulse)

Good luck,
Achim