jbdavid
|
It is possible. if you have an easy way to take the constraints into the optimization tool (which is what the "synthesis" tool has to be) The last attempt at this - Barcelona Design's tool, was successful at building OpAmps and even PLL's.. but the time it took to capture the constraints in a form compatible with the optimization engine, and tuning was much less efficient than having a designer iterate the design for a new spec.. Worse, you practically had to start over if you needed a circuit topology not already supported by the constraint sets you had done.. This is the "holy grail" (the object of the "quests" undertaken in Arthurian Legends) of Analog design..
but If you have specs, and a "simulator in the middle" optimization engine with a good RCX extraction tool, and a compute farm you might be able to find some good solutions that you could put in a library..
|