ywguo
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Hi,
If that is a track-and-hold at the front-end of ADC, I think that the sampling frequency should the same as the clock. I would choose the sampling points where the output has settled. If using HSPICE, the print step of .tran can be set equal to the cycle of clock. Then print the output using .print card. Try to run a DFT using Matlab. Sometimes we also using .FFT card in HSPICE. However, I am not clear how to set the sampling point accurately. :(
Yawei
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