The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Aug 15th, 2024, 2:24pm
Pages: 1
Send Topic Print
AC Analysis of Verilog-A Module (Read 8275 times)
Nano_Model
Junior Member
**
Offline



Posts: 10

AC Analysis of Verilog-A Module
Jul 13th, 2007, 2:58pm
 
Hi,

I have a complicated 4-terminal device module written in Verilog-A. It works for DC and transient analyzes. However, when I use it to run AC analysis, what I get from the output are all unexpected zeros. What's a possible reason for this?

I read previous post saying that the simulator builds an equivalent small-signal circuit based on DC information it has. How does it actually work? Like...does it build a typical hybrid-pi model, a T-model? or? Can I "probe" the small-signal capacitances calculated by the simulator in this case? Give the complexity of my module, I wonder how can the simulator build a SS circuit for it. Does it just treat my module as a black-box and probe its terminal behavior?

Thanks a lot,
Nanodel
Back to top
 
 
View Profile   IP Logged
Ken Kundert
Global Moderator
*****
Offline



Posts: 2386
Silicon Valley
Re: AC Analysis of Verilog-A Module
Reply #1 - Jul 13th, 2007, 4:39pm
 
Did you provide a small-signal stimulus?

-Ken
Back to top
 
 
View Profile WWW   IP Logged
Nano_Model
Junior Member
**
Offline



Posts: 10

Re: AC Analysis of Verilog-A Module
Reply #2 - Jul 15th, 2007, 1:47pm
 
Yes, I used (in SPICE) .ac analysis...
Back to top
 
 
View Profile   IP Logged
Geoffrey_Coram
Senior Fellow
******
Offline



Posts: 1999
Massachusetts, USA
Re: AC Analysis of Verilog-A Module
Reply #3 - Jul 16th, 2007, 4:46am
 
You didn't answer Ken's question.  Having an ac analysis doesn't mean that there's actually an ac source (small-signal stimulus) in the circuit.  If you don't have a stimulus, then you'll always get zero output.

The following is a 5V dc source *with* a magnitude=1 small-signal stimulus.
V1 1 0 5 ac 1

The simulator takes the (symbolic) derivatives of all the expressions you used in your module and uses them to determine the ac response.  It needs the derivatives anyway for using Newton's method to solve the dc operating point.
Back to top
 
 

If at first you do succeed, STOP, raise your standards, and stop wasting your time.
View Profile WWW   IP Logged
Nano_Model
Junior Member
**
Offline



Posts: 10

Re: AC Analysis of Verilog-A Module
Reply #4 - Jul 16th, 2007, 10:56am
 
Thanks Geoffrey. Yes, I did include an ac stimulus like what you've said. Nevertheless, I still got 0.0 as my output.

Now from your answer, I have another question. Is the simulator always able to compute the symbolic derivatives of any expression? My drain current expression is not analytical. It involves solving a self-consistent equation iteratively. So, in this case, I wonder how the simulator computes the derivatives and linearizes my module.? Huh
Back to top
 
 
View Profile   IP Logged
Geoffrey_Coram
Senior Fellow
******
Offline



Posts: 1999
Massachusetts, USA
Re: AC Analysis of Verilog-A Module
Reply #5 - Jul 19th, 2007, 4:44am
 
I believe the simulator is always able to compute the symbolic derivative.  Even if you have an iterative solution, it's all composed of assignments:

//dx_dv = dx0_dv;
x = x0;
for (...) begin
// dx_dv = dx_dv + dupdate_dv;
x = x + update;
end

where the //commented lines are added by the compiler generating the C code from the Verilog-A.
Back to top
 
 

If at first you do succeed, STOP, raise your standards, and stop wasting your time.
View Profile WWW   IP Logged
Nano_Model
Junior Member
**
Offline



Posts: 10

Re: AC Analysis of Verilog-A Module
Reply #6 - Jul 21st, 2007, 10:44am
 
Cool.

Are there any manuals/books/documents for me to understand how the simulator works? Like...how the verilogA code is converted to C...and how the simulator runs various analysis... Smiley
Back to top
 
 
View Profile   IP Logged
Geoffrey_Coram
Senior Fellow
******
Offline



Posts: 1999
Massachusetts, USA
Re: AC Analysis of Verilog-A Module
Reply #7 - Jul 27th, 2007, 6:36am
 
I don't think there are any books (nor even papers) on how Verilog-A is converted to C.  There might be something about how Verilog-A equations are translated to equations and unknowns in the simulator in "The Designer's Guide to Verilog-AMS."  (Chapter 3, Analog Modeling, Section 2.1, Conservative Systems)

As for how the simulator runs analyses, "The Designer's Guide to Spice & Spectre" is probably going to cover it for you.

If you click "Books" above, you can get to some links that will chip a few cents (maybe a buck or two?) back to help support this site.

For your actual problem: can you try writing an explicit function for the drain current (maybe the "initial guess" for the iteration)?

Also, check your if() statements carefully.  Sometimes people things like:
if (x < -100)
 Iout = 0;
else
 Iout = f(x);

forgetting that Iout = 0 also means dIout/dx = 0, and this would give you a zero output in ac.
Back to top
 
 

If at first you do succeed, STOP, raise your standards, and stop wasting your time.
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.