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The Designer's Guide Community Forum › Design Languages › Verilog-AMS › cross statement in example VCO in designers guide
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cross statement in example VCO in designers guide (Read 1710 times)
sylak
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cross statement in example VCO in designers guide
Aug 29th, 2007, 3:41pm  
In the VCO ( no jitter) given in the example section here in designers guide ...there is a cross statement with a phase+`M_PI/2

what does this cross statement do? I can understand if there is a '-'(minus ) in the place of '+'.


what is the condition here and how doesn this work ? isnt it always positive ?say phase is 0.6 or any other integer?

// identify the point where switching occurs
   @(cross(phase + `M_PI/2, +1, ttol)...
...
...
...

Thanks
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Geoffrey_Coram
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Re: cross statement in example VCO in designers gu
Reply #1 - Aug 31st, 2007, 8:23am  
phase isn't necessarily positive; the idtmod call shows it starting at -0.5 * 2 * `M_PI, which is -`M_PI:

   phase = 2*`M_PI*idtmod(freq, 0.0, 1.0, -0.5);
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