hello
i am working on the veriloga battery model proposed by prof. Mora in the article
http://www.rincon-mora.com/publicat/journals/tec05_batt_modl.pdfI am beginer and have some problems in implementing that in veriloga.
In the attached schematics there is battery model with nodes.
I did it as follows
module battery(minus, plus, vref);
inout minus, plus, vref;
electrical minus,plus,vref;
electrical vsoc,v1,v2,v3;
parameter real Rdis=10M;
parameter cap=0.015;
real C,capS,capL,vtemp;
analog begin
@(initial_step) begin
vtemp =1;
end
V(vsoc,vref) <+ vtemp;
C=3600*cap;
capS=-752.9*limexp(-13.51*V(vsoc,vref))+703.6;
capL=-6056*limexp(-27.12*V(vsoc,vref))+4475;
I(vsoc,vref) <+ V(vsoc,vref)/Rdis;
I(vsoc,vref) <+ ddt(C*V(vsoc,vref));
I(vsoc,vref) <+ I(minus,v1);
V(v1,minus) <+ -1.031*limexp(-35*V(vsoc,vref))+3.685+0.2156*V(vsoc,vref)-0.1178*pow(V(vsoc,vref
),2)+0.3201*pow(V(vsoc,vref),3);
I(v1,v2) <+ V(v1,v2)/(0.1562*limexp(-24.37*V(vsoc,vref))+0.07446);
I(v2,v3) <+ V(v2,v3)/(0.3208*limexp(-29.14*V(vsoc,vref)));
I(v2,v3) <+ ddt(capS);
I(v3,plus) <+ V(v3,plus)/(6.603*limexp(-155.2*V(vsoc,vref))+0.04984);
I(v3,plus) <+ ddt(capL);
end
there is one problem, the model is not working
![Smiley Smiley](https://designers-guide.org/forum/Templates/Forum/default/smiley.gif)
can you advice anything?
regards