kanan
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Hello, The verilog-a manual says that the delay model in an ac simulation has a response of e(-jwt). This does not seem to be the case. I ran the code fragment: V(out)<+absdelay(V(vin), const_t) in ac and got a very large attenuation and 0 phase shift at all frequencies. Am I doing something wrong? Is there a way to model delays in ac?
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