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The Designer's Guide Community Forum › Simulators › AMS Simulators › verilog(rtl) code for phase frequency detector
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verilog(rtl) code for phase frequency detector (Read 790 times)
nikki
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verilog(rtl) code for phase frequency detector
Feb 07th, 2008, 5:21am  
Embarrassed can any one please help me wid d verilog coding of phase frequency detector in pll?
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sheldon
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Re: verilog(rtl) code for phase frequency detector
Reply #1 - Feb 8th, 2008, 3:08am  
Nikki,

 Any reason to implement the PFD in RTL? Wouldn't it be easier to do
at the gate level? You should be able to implement a gate level version
directly from most block diagrams/schematics.

                                                              Best Regards,

                                                                 Sheldon
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nikki
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Re: verilog(rtl) code for phase frequency detector
Reply #2 - Feb 8th, 2008, 4:20am  
yes it would be easy to do the top level simulation but for a documentation purpose the requirement is as such i implement it using rtl code.

rtl code for pfd and divider both

if u cud help....
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