tuyettrinh
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Posts: 3
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Hi there,
I just download an example for PLL code in Verilog-AMS from this website, but none of PLL's module (cp, fd, vco, ...) works. For example, the compiler complains about reg, always, assign ... are future reserved keyword. I am using SpectreHDL compile. Please let me know if I am using a wrong compiler. Thanks a lot.
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