The Designer's Guide Community
Forum
ForumVerilog-AMSAnalysisModelingDesignTheory
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Jul 17th, 2024, 10:38am
 
  HomeHelpSearchLoginRegisterPM to admin    
The Designer's Guide Community Forum › Simulators › Circuit Simulators › Cadence device based stability analysis
‹ Previous topic | Next topic ›
Pages: 1
Send Topic Print
Cadence device based stability analysis (Read 2109 times)
sahrling
New Member
*
Offline



Posts: 1
Cadence device based stability analysis
Jun 19th, 2008, 9:43am  

Hi,

We're trying to use/understand the device based algorithm in cadence stb analysis. Is there anyone that has more information on the inner workings of this tool? The documentation is somewhat confusing.

Thanks,
Mikael
Back to top
 
 
View Profile   IP Logged
ywguo
Community Fellow
*****
Offline



Posts: 943
Shanghai, PRC
Re: Cadence device based stability analysis
Reply #1 - Jul 2nd, 2008, 10:30pm  
Hi Mikael,

I think there are several posts in this forum about stb analysis. Please go to http://www.designers-guide.org/Forum/YaBB.pl?num=1201763532/1#1. It would be helpful.

Best regards,
Yawei
Back to top
 
 
View Profile   IP Logged
Pages: 1
Send Topic Print
‹ Previous topic | Next topic ›
« Home ‹ Board
The Designer's Guide Community Forum » Powered by YaBB 2.2.2!
YaBB © 2000-2008. All Rights Reserved.
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.