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sprun

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Same code but different result?
Sep 03^rd, 2008, 1:48am

Hi guys, I need your help!

I wrote a paragraph of verilog-A code before and it behaves properly when using Spectre to simulate it. However, when I merely changed the simulator to AMS while using exactly the same code (of course I followed the AMS simulation flow), the output turned out to be totally different!

I really cannot understand why this happens. Could someone tell me?Thanks so much!

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sprun

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Posts: 7

Re: Same code but different result?
Reply #1 - Sep 3^rd, 2008, 2:28am

Below is the code I used.

*******************************************************************
`include "constants.vams"
`include "disciplines.vams"

module VXR(clk,out,outboost);

input clk;
electrical clk;
output out, outboost;

electrical in, inboost, out, outboost;
real Rch;
integer odd1, odd2;

parameter real C = 1.0e-9;
parameter real VDD = 3.3;
parameter real Vth1 = 1.62;
parameter real Vth2 = 1.75;
parameter real f1 = 1.3e6; //freq=5MHz
parameter real f2 = 6.5e5; //freq=5MHz
parameter integer N1 = 3; //pump stage
parameter integer N2 = 2; //pump stage
parameter real Ron = 1e-12; //switch resistor when on
parameter real Roff = 1e12; //switch resistor when off
parameter real Rload1 = 1.7e5; //load resistor
parameter real Rload2 = 1.0e5; //load resistor
parameter real Rup = 1.0e5; //

analog begin
if(V(clk)-2.0>0)
Rch = Ron;
else
Rch = Roff;

odd1 = N1%2;
odd2 = N2%2;

@(initial_step)
begin
V(out) <+ 2.0;
V(outboost) <+ 2.0 ;
end

V(inboost) <+ VDD+N1*VDD-(N1+1.0)*Vth1;
V(outboost,inboost) <+ ((N1/C+Rch)/f1)*I(inboost,outboost);
I(inboost,outboost) <+ ( (4.0*N1*N1-N1-3.0)*C/(12.0*(N1+1.0) ) *ddt(V(outboost)) + V(outboost)/Rload1 + (V(outboost)-VDD)/Rup)*odd1 + ( (4.0*N1*N1+3.0*N1+2.0) * C/(12.0*(N1+1.0)) * ddt(V(outboost)) + V(outboost)/Rload1 + (V(outboost)-VDD)/Rup )*(1-odd1);

V(in) <+ VDD+N2*VDD-(N2+1.0)*Vth2;
V(out,in) <+ ((N2/C+Rch)/f2)*I(in,out);
I(in,out) <+ ( (4.0*N2*N2-N2-3.0)*C/(12.0*(N2+1.0) )*ddt(V(out)) + V(out)/Rload2 + (V(out)-VDD)/Rup)*odd2 + ( (4.0*N2*N2+3.0*N2+2.0) * C/(12.0*(N2+1.0)) * ddt(V(out)) + V(out)/Rload2 + (V(out)-VDD)/Rup ) *(1-odd2);

end

endmodule

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jbdavid

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Posts: 378
Silicon Valley

Re: Same code but different result?
Reply #2 - Sep 3^rd, 2008, 8:10am

you've violated a couple of basic rules in this code..
NOT that that tells me why you see different results in AMS vs Spectre, buts its stuff you should fix before you go off investigating that ..

1. putting contributions in the initial_step
2. trying to drive both voltage and current between the same nodes..

your initial_step block is effectively a capacitor with an initial voltage, but without the capacitance.. If you have a load capacitance that you want to initialize to a non-zero state.. then set the initial state of the cap..
what you did isn't "illegal" in the language.. but its not good practice.

and then by swapping the V(out,in) I(in,out)
in your main block, you've effectivly declared two branches between those two nodes.. which is kinda like paralleling a voltage source with a current source. Again, not illegal, but I'll bet its not really what you wanted.

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jbdavid
Mixed Signal Design Verification

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