Hi Holmes,

Since your AMS compiles well in the HED mode, my first thought is your are defining some 'include directories' in HED and not in ADE.
If you are including verilog-A, then the compiler will look at this files in the 'include directory list'. I guess you have something defined in your HED mode : HED-> AMS -> Option -> Compiler -> Verilog-AMS -> Macros/Include -> Include Directory

If so, you need to include the same directories when working in ADE mode : ADE -> Simulation -> Options -> Compiler -> Include Path

Hope this helps.
Riad