Monkeybad
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Hello! everyone, I find some data about measuring the DNL/INL of an ADC by using slow frequency sin wave. Actually this data is from "EE315: VLSI Data Conversion Circuits" in STANFORD UNIVERSITY, Department of Electrical Engineering. Here is the MATLAB code.
function [dnl,inl] = dnl_inl_sin(y); %DNL_INL_SIN % dnl and inl ADC output % input y contains the ADC output % vector obtained from quantizing a % sinusoid % Boris Murmann, Aug 2002 % Bernhard Boser, Sept 2002 % histogram boundaries minbin=min(y); maxbin=max(y); % histogram h = hist(y, minbin:maxbin); % cumulative histogram ch = cumsum(h); % transition levels T = -cos(pi*ch/sum(h)); % linearized histogram hlin = T(2:end) - T(1:end-1); % truncate at least first and last % bin, more if input did not clip ADC trunc=2; hlin_trunc = hlin(1+trunc:end-trunc); % calculate lsb size and dnl lsb= sum(hlin_trunc) / (length(hlin_trunc)); dnl= [0 hlin_trunc/lsb-1]; misscodes = length(find(dnl<-0.9)); % calculate inl inl= cumsum(dnl);
Anyone can explain how this method work? Especially what the red line means. Thanks!
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