Tlaloc
Community Member
![* *](https://designers-guide.org/forum/Templates/Forum/default/stargold.gif) ![* *](https://designers-guide.org/forum/Templates/Forum/default/stargold.gif)
Offline
Posts: 81
Dallas, TX
|
I've thought a lot about this, and there are only two ways that I could think for this to work.
1) If your trimming was a different analysis than your main sim, e.g. a dc and a tran, then you could trim from a dc analysis and follow up with a tran. Here, you can code the veriloga to key off of the different analyzes to determine if you will allow the trim or not.
2) Other than that, you might have to run the monte for your trimming algorithm at room temp; write out the trim codes to a text file; then run the monte using the same seed, across temp, reading in the value from the file. This also has potential problems since I don't know if veriloga can find the information about the monte run itself. You may have to use the text file as a FIFO stack and delete the trim value as you are using them.
|