prabal
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Hi Rajdeep,
I'm sure you're aware of this, but just a as a level-set, here're some terminologies:
It is the discipline of a conservative system that the user declares. One such discipline is electrical. Other disciplines could be mechanical, rotational etc. Each discipline has its potential and flow access functions (for the conservative system) that are defined by the natures associated with that discipline. For electrical discipline, voltage is the potential access function.
You are right that Spectre was designed to be one that simulated a conservative system. The other possibility that you alluded to would be one that simulated a signal-flow system in which only the potential nature is relevant.
Spectre does support $discontinuity() in Verilog-A, if that is what you are referring to. Is there a specific case of announcing discontinuity that is not working for you?
Regarding port direction, unless you're hooking your Verilog-A model to a digital design, the port direction in Verilog-A does not matter and is always inout. I tend to think of port direction specification as a documentation aid.
Regarding your comment in the last post about alternative to Spectre, have you considered writing real numbered models using, for example, VHDL real numbers or Verilog-AMS wreal that use the event-driven engine, and, assumes a signal-flow system.
Thanks, Prabal.
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