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How to use vcs or vsim inside Cadence ADE (Read 2515 times)

Julian18

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How to use vcs or vsim inside Cadence ADE
Nov 20^th, 2008, 11:00pm

Hi, there
I am just on a mixed-signal project, sine we dont have nc verilog licence, what can I do to simulate a mixed-signal project in which both cadence schematic and Verilog HDL is used. When I asked the digital guys, they told me they use vcs or vsim to compile the HDL file. I wonder if it is possible for cadence to call other verilog compilers?

Thanks.

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jbdavid

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Re: How to use vcs or vsim inside Cadence ADE
Reply #1 - Dec 18^th, 2008, 7:20pm

If you use spectre for your analog, you need AMS.. I don't think you need NCSIM license, as long as you have enough MMSIM tokens available (AMS needs 3 tokens)
you do need an AMS environment license.

Otherwise you are stuck with command line simulation, and you need the right analog simulator ( or other technology) to simulate the digital with the analog.

SNPS has a mixed signal simulator, (nanosimVCS) there might be an ADE interface for it.. but you would need to purchase it from SNPS not from Cadence..

good luck..

jbdavid
Mixed Signal Design Verification

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