ricky
New Member
Offline
Posts: 4
|
hello,everyone I am a beginner of verilog-a.I am working on a CDC(cap to digital converter).i need to model a vccap. this is my code: module c_module(c_p,c_n,vp,vn); inout c_p ,c_n,vp ,vn; electrical c_p,c_n,vp,vn; parameter c0=1.0; real c; analog begin c=c0*V(vp,vn); I(c_p,c_n)<+c*ddt(V(c_p,c_n)); end endmodule
but error found by spectre as follows: an operand dependent on the output of a dot() operator (dynamic expression) can not be used in a multiplication opeeration when the other operand is dependent on a probe or the simulation time. consider using a node to hold the dynamic expression and probe this node in the multiplication operation.
thanks for your help! ricky
|