If that's ALL that's in your simulation, I doubt the turbo option helps.
I'm running a simple receiver and am only a 120us after over a week..
Make the ADC model mixed signal so that the CLOCK and digital output pins in the ADC never touch the spectre solver.. it will probably run a LOT LOT faster..
(especially if the clock rate is higher than the analog signal bandwidth you are sampling.. and it should be a LEAST 2x..
remember that the clock results in a MINIMUM of 4 timesteps per cycle if it goes to analog side.. point are at the start and stop of each transition..

(THIS is the one of the fatal (to me) flaws of SpectreVerilog simulator..) your using AMS.. only half of that ADC is analog..
jbd

Spectre is not very efficient in handling discrete events. The digital simulators are more efficient in this regard. So, in a mixed signal design it is better to model the discrete events such as clocking using
the digital (Verilog-D) constructs of Verilog-AMS. This will ensure that spectre does NOT try to solve ('touch') the discrete events (as you have modeled them using Verilog-D constructs), rather the digital simulator will do that in a more efficient way and the overall run-time could be significantly less!!
[By Verilog-D I mean the usual Verilog language used for logic signals e.g. always]

Never tried! But seems unlikely as those are primitive blocks and spectre probably has better way (predefined) way of handling them. But if your clock has enabling feature then it makes sense to code
it in verilog as your simulation will be very fast when the clock is not ticking (disabled). But a primitive voltage pulse from analogLib will tick always.

Hope it helps!
Rajdeep