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vhdl-ams in cadence ams designer ius810, ic0611 (Read 4295 times)

godfather Community Member Offline Posts: 36	vhdl-ams in cadence ams designer ius810, ic0611 Jan 29^th, 2009, 3:08pm hi all, i have some behavioral designs in vhdl-ams, so what libraries path i should include in the cds.lib path so that i can compile my vhdl-ams designs. and can anybody guide , is it is possible �vhdl-ams or verilog-ams design being synthesized �in using cadence ams designer.
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Andrew Beckett

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Re: vhdl-ams in cadence ams designer ius810, ic0611
Reply #1 - Jan 29^th, 2009, 9:38pm

You'd normally need to put:
Code:

INCLUDE $IUSHOME/tools/inca/files/IEEE_vhdlams/cds.lib

in your cds.lib to reference the various VHDL standard libraries.

As for synthesizing VerilogAMS or VHDL-AMS code, I don't believe any tools can do that. There has only been limited success of tools performing Analog Synthesis (it's rather hard to have a general solution; specific tools for specific types of designs have been done, but these (as far as I know) are not normally synthesizing from a VerilogAMS or VHDL-AMS model, but from a specification of some sort).

http://www.edadesignline.com/showArticle.jhtml?articleID=192200530
http://www.planetanalog.com/showArticle.jhtml?articleID=12804584

Both of the articles are a little old, but I just did a very quick google search. Several of the companies in this area have either been acquired or gone out existence...

Andrew.

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