boe
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R. Zakai, Verilog is quite old and purely digital, so signal levels are modeled as LOW, HIGH, X and Z (different drive strengths are possible for all, though), independent of supply voltage... Std cell gates usually have global nets for the supplies and you need them for * LVS, or * interfaces between analog & digital. And interface handling depends on the tools you use and your technology/PDK - and why do you need them anyway? Do you have different digital supplies? B.O.E
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