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Question about the plot for gm/Id design methodology (Read 513 times)

Yutao Liu

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Posts: 76
Guangzhou, China

Question about the plot for gm/Id design methodology
Apr 21^st, 2009, 12:31am

Hi everyone,
I am confused about why the Vgs is set to be Vth+200mV when plotting gm*ro versus Vds.

first, why the Vgs should be Vth+200mV while ploting gm*ro versus Vds?

second, while sweeping Vds, the actual threshold voltage would change as well, how should I define the value of "Vth" in the "Vth+200mV"? And how should I implement this simulation in Spectre?

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analogue_guy Community Member Offline Posts: 38	Re: Question about the plot for gm/Id design methodology Reply #1 - Apr 22^nd, 2009, 3:10pm Hi, I guess you want to bias your transistor in strong inversion, that is why you use Vth+200 mV. The standard textbook definition of strong inversion: VGS> Vthreshol + 6* Thermal voltage (kT/q). If you want some safety margin, you will end up at Vthreshold+200 mV. regards
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