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VerlogA, AHDL, VerilogAMS (Read 2636 times)
casual
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VerlogA, AHDL, VerilogAMS
May 14th, 2009, 5:03am
 
May I know the differences among verilogA, verilogAMS, AHDL & system Verilog?
Is verilogAMS equal to verilogA + verilog?
I am new in this area.
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jbdavid
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Silicon Valley
Re: VerlogA, AHDL, VerilogAMS
Reply #1 - May 14th, 2009, 6:30pm
 
Actually: Verilog-AMS = Verilog-A + Verilog(-D) + the Mixed Signal Interaction stuff..
ie
--
there are selections from the LRM available on this site
always @(cross(V(in))) begin
end

analog begin
  @(posedge Sel) begin
  end
end
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jbdavid
Mixed Signal Design Verification
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casual
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Re: VerlogA, AHDL, VerilogAMS
Reply #2 - May 15th, 2009, 5:36pm
 
thanks. I have found the informtion from web.
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