ywguo
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Hi Guys,
The layout is extracted with Assura. Then I ran a post-layout simulation with a config view, in which the av_extracted view is instantiated instead of schematic vew. However, the net names in schematic has not one to one map in the av_extracted view because it is extracted with distributed RC mode. The net is cut into dozens of segments with wired net names. For example, the net name I111_n13 becomes a few nodes like _29:\I111_n13.
When I tried to plot/save the net voltage in ADE, it failed to find the net unfortunately.
Open ADE, choose outputs -> Output Setup, fill in Expression I5/_29:\I111_n13. It becomes (I5/_29 : \I113_n13) automatically. >:(
I think there must be something wrong. Any comments are appreciated.
Best Regards, Yawei
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