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The Designer's Guide Community Forum › Simulators › Circuit Simulators › Error found while using bmslib component (Bit stream ) in Cadence

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Error found while using bmslib component (Bit stream ) in Cadence (Read 11995 times)

cmos.analogvala

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Error found while using bmslib component (Bit stream ) in Cadence
Oct 11^th, 2009, 1:00am

I found following error in CIW of cadence while generating netlist that includes bms lib component Bit stream.

Missing or incorrect master.tag in library bmslib cell Bitstream view spectre cmos_sch cmos.sch schematic veriloga ahdl. The OSS netlister uses reference to the text view (such as mymodule.vams) contained in the master.tag file. Verify that you have a master.tag file in the view directory and that the pointer to the text file in lib/cell/view/master.tag is correct.

I checked the symbol view of the cell. It has master.tag file.

Any Solutions ?

-Marshnil

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Andrew Beckett

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Re: Error found while using bmslib component (Bit stream ) in Cadence
Reply #1 - Jan 3^rd, 2010, 3:21am

The BitStream component only has a "behavioral" view. Looking at it, this is a pure verilog view, and so can only be simulated in AMS Designer (or Verilog of course). Which simulator were you using? Maybe it was spectreVerilog? I'm having to guess...

Also, you'd need to ensure that the behavioral view was being selected in the config (or have the behavioral view listed in the switch list in the config). It doesn't look like that was the case.

If it's picking the symbol view, that won't work, because that doesn't contain the code itself.

Regards,

Andrew.

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Davivilla

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Re: Error found while using bmslib component (Bit stream ) in Cadence
Reply #2 - Feb 3^rd, 2014, 7:48am

Hi

I have a similar problem.
I try to simulate a verilogAMS file with spectre and i get:

ERROR: Missing or incorrect master.tag in library test_verilogAMS cell amplifdif view spectre cmos_sch cmos.sch schematic veriloga ahdl.

The OSS netlister uses reference to the text view (such as mymodule.vams) contained in the master.tag file.

Verify that you have a master.tag file in the view directory and that the pointer to the text file in lib/cell/view/master.tag is correct.

please

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Andrew Beckett Senior Fellow Offline Life, don't talk to me about Life... Posts: 1742 Bracknell, UK	Re: Error found while using bmslib component (Bit stream ) in Cadence Reply #3 - Feb 6^th, 2014, 3:46am That's because spectre is an analog simulator, not a mixed signal simulator. It cannot simulate VerilogAMS, but only the analog subset - so it supports VerilogA. If you want to use VerilogAMS, you'd need to use "ams" as the simulator (AMS Designer). Regards, Andrew.
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Davivilla

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Re: Error found while using bmslib component (Bit stream ) in Cadence
Reply #4 - Feb 6^th, 2014, 4:17am

Thank you Andrew,

when i chose "ams" in ADE. I get this just select ams:

*Error* To be able to run the ams simulator in the Analog Design Environment, you must use a design with a 'config' view.

*Error* asiEnvGetVar: Variable `envOpts netlisterMode' not declared for tool `spectre0'

*Error* asiEnvGetVar: Variable `envOpts netlisterMode' not declared for tool `spectre0'

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boe Community Fellow Offline Posts: 615	Re: Error found while using bmslib component (Bit stream ) in Cadence Reply #5 - Feb 6^th, 2014, 6:21am Davivilla, you need to create a config view for the top-level cell and simulate this view. - B O E
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Davivilla Junior Member Offline Posts: 15	Re: Error found while using bmslib component (Bit stream ) in Cadence Reply #6 - Feb 6^th, 2014, 6:51am Hi BOE, Yes, but the probles is i dont know what that mean. do i need to create a new cellview?? a config view is different to cellview?? excuse but can you explain how creat it?? Thank you so much Best Regards
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boe

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Re: Error found while using bmslib component (Bit stream ) in Cadence
Reply #7 - Feb 6^th, 2014, 9:56am

Davivilla wrote on Feb 6^th, 2014, 6:51am:

do i need to create a new cellview??

Yes.
Quote:

a config view is different to cellview??

A config view is a cellview of type "config" (open with "Hierarchy Editor").
Quote:

excuse but can you explain how creat it??

File->New>Cell View.
- B O E

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Davivilla Junior Member Offline Posts: 15	Re: Error found while using bmslib component (Bit stream ) in Cadence Reply #8 - Feb 7^th, 2014, 11:18am thanks BOE i created a new config view by file > new > cellview > hierarchy-editor then apears a new window "new configuration" i know is bored but can you explain how to configure the simulator for my problem? Best regards
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Andrew Beckett

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Re: Error found while using bmslib component (Bit stream ) in Cadence
Reply #9 - Feb 8^th, 2014, 1:04am

There is a tutorial in the installation, which is covered in the documentation. I would start by using the Help menu in the CIW in virtuoso, and going to the tree you see and looking at either AMS Designer or AMS Environment. There are some tutorials there - it depends on which version you're using as to what they are called though.

Otherwise, the quick answer is that when you create the new config, you'll be prompted with a "New Configuration" form. At the bottom there's a "Use Template" button. Hit that, and pick "AMS" as the template. OK the form. Now back in the New Configuration form, change the View to be the top view (the schematic) of your design. OK this form.

Now you have a config. This allows you to modify which views get used for which blocks. Save the config, and then hit the Open button in the hierarchy editor. This will open the configured schematic. From this you can start ADE (you'll notice that ADE is now using the lib/cell/config rather than lib/cell/schematic).

There's also documentation on the hierarchy editor if you want to find out more about how that works.

Regards,

Andrew.

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