Hi,all
 Firts, i'm a newer in verilog-a and this forum.
 i need a special model used in hspice, that a delay cell for ckout from ckin,i have constant delay model as follow,but actually i need is delay time----dtime,can control vs time when used in hspice,such as .tran in hspice,when t=t1 dtime=20n,t1-->t2 ,dtime vary from 20n to 30n lineraly. how should i do ?
`include “discipline.h”
module delay_cell (in, out);
input in;
output out;
electrical in, out;
parameter real dtime = 20n;

analog begin
V(out) <+ delay(V(in), dtime);
end
endmodule

need help sincerely and urgent for project reason .