liletian
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Hi All Does any of you know how to build a time variable resistor model. I used the following verilogA code, but I can not use $time in my code. Does anyone know if there is a way to do it? Thank you // VerilogA for verilogA_lib, res, veriloga
`include "constants.vams" `include "disciplines.vams"
module res(p,n); inout p,n; electrical p,n; parameter real r=0 from [0:inf); V(p,n) <+($time+ r)*I(p,n); Does not work at all
endmodule
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