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Increase veriloga simulation accuracy in hspice simulator (Read 2927 times)
neoflash
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Increase veriloga simulation accuracy in hspice simulator
Mar 08th, 2010, 2:03pm
 
Hi,

I found even if I specify hspice accuracy setting to runlvl=6 and accurate, the waveform from verilogA blocks still look ugly.

Is there any other setting I can use to make verilogA part more accurate?

Thanks,
Neo
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patrick
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Re: Increase veriloga simulation accuracy in hspice simulator
Reply #1 - Mar 8th, 2010, 4:35pm
 
Try runlvl=0, i.e. disable runlvl.
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Geoffrey_Coram
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Re: Increase veriloga simulation accuracy in hspice simulator
Reply #2 - Mar 10th, 2010, 7:15am
 
You may also want to have a close look at your Verilog-A module:
- does it have continuous/smooth outputs (as a function of the inputs)
- do you have scaling issues (outputs that are huge or tiny compared to the normal scale of voltages and currents)
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