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liletian Community Member Offline Posts: 97 MD	Re: MLIN simulation question in RFDE Reply #15 - Apr 27^th, 2010, 11:00am pancho_hideboo wrote on Apr 27^th, 2010, 10:58am: Later I will do netlisting of your schematic("test_TL_filter_tar.gz"). thank you, I am looking forward to your reply.
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liletian Community Member Offline Posts: 97 MD	Re: MLIN simulation question in RFDE Reply #16 - Apr 28^th, 2010, 7:40am liletian wrote on Apr 27^th, 2010, 11:00am: pancho_hideboo wrote on Apr 27^th, 2010, 10:58am: Later I will do netlisting of your schematic("test_TL_filter_tar.gz"). thank you, I am looking forward to your reply. hi pancho Did you have a look on the file? What is the problem? Thank you, B
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pancho_hideboo

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Re: MLIN simulation question in RFDE
Reply #17 - Apr 28^th, 2010, 8:16am

liletian wrote on Apr 27^th, 2010, 10:44am:

Error detected by hpeesofsim during netlist parsing.
� �ADS-syntax parser error in `input.ckt', line 6:
�syntax error

(1) Don't enclose MSub1 for "Subst" parameters of "MLIN" with double quotations if you use RFDE(ADSsim).
This is a syntax error in the above.
See schematic for ADSsim in attached figure.
On the other hand, you can enclose with double quotations if you use Agilent GoldenGate.

(2) Callback skill code for netlisting of "adsLib/MSUB" is corrupted due to some reason.
My RFDE is CDBA version of RFDE2008Update2.
As far as CDBA version of RFDE2008Update2, callback skill code for netlisting of "MSUB" can't work.
Try to use OpenAccess version, for exaple, OpenAccess version of RFDE2009 which is a final version of RFDE.

(3) As workaround, don't place "adsLib/MSUB" in schematic.
Instead include netlist scratch for "MSUB".
It is easily available in ADS native environment.

(4) Use Agilent GoldenGate instead of Agilent RFDE.

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test_TL_filter.png

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pancho_hideboo

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Re: MLIN simulation question in RFDE
Reply #18 - Apr 28^th, 2010, 8:29am

The followings are netlist sets for RFDE(ADSsim).

"test_TL_filter.ads" Quote:

simulator lang=ads
Options ResourceUsage=yes Verbose=yes UseNutmegFormat=no�TopDesignName="data"

; Generated by: DFII version 5.10.41.500.5.98 (using OASIS direct)

#include "~/RFDE/msub1.ads"

MLIN2:I4 net06 net7 Subst="MSub1" W=250.00u L=5m Wall1=1e+30 Wall2=1e+30 Mod=1

simulator lang=spectre
PORT1 (net06 0) port r=50 num=1 type=dc
PORT2 (net7 0) port r=10M num=2 type=dc
C0 (net7 0) capacitor c=100.0f

simulator lang=ads
Options:Options1 Temp=25.0 Tnom=27 TopologyCheck=yes GiveAllWarnings=yes�MaxWarnings=10

S_Param:SP1 SweepVar="freq" SweepPlan="SP1_stim" CalcS=yes StatusLevel=2 \
� �CalcNoise=no OutputPlan[1]="GlobalOutputPlan" OutputPlan[2]="GlobalInhibitPlan"

SweepPlan:SP1_stim Sort=yes Start=1k Stop=10G Dec=21

OutputPlan:GlobalOutputPlan Type="Output" UseBuiltinRule=no \
� �OverrideInhibitRule=no UseNodeNestLevel=yes NodeNestLevel=2 \
� �UseCurrentNestLevel=yes CurrentNestLevel=999 \
� �UseDeviceCurrentNestLevel=no

OutputPlan:GlobalInhibitPlan Type="Inhibit" UseBuiltinRule=no \
� �OverrideInhibitRule=no NodeRegExpr[1]="\.net[0-9]+$|^net[0-9]+$"

mapping {
�pinMapping {
� �capacitor 1:"PLUS" 2:"MINUS"
� �port 1:"PLUS" 2:"MINUS"
� �MLIN2 1:"P1" 2:"P2"
�}
}

"msub1.ads" Quote:

simulator lang=ads
model MSub1 MSUB H=10.0u Er=9.6 Mur=1 Cond=1e+50 Hu=1e+36 T=0 TanD=0 Rough=0

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pancho_hideboo

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Re: MLIN simulation question in RFDE
Reply #19 - Apr 28^th, 2010, 8:36am

The following is a netlist for Agilent GoldenGate.

"test_TL_filter_GG.scs" Quote:

// Generated for: spectre
// Generated on: Apr 28 15:40:05 2010
// Design library name: My_RFDE_Test
// Design cell name: test_TL_filter_GG
// Design view name: schematic
simulator lang=spectre
global 0

// Library name: My_RFDE_Test
// Cell name: test_TL_filter_GG
// View name: schematic

MSub1 MSUB H=10.0u Er=9.6 Mur=1 Cond=1e+50 Hu=1e+36 T=0 TanD=0 Rough=0

I4 (net06 net7) MLIN Subst="MSub1" W=250.00u L=5m Wall1=1e+30 Wall2=1e+30 Mod=Kirschning

PORT1 (net06 0) port r=50 num=1 type=dc
PORT2 (net7 0) port r=10M num=2 type=dc
C0 (net7 0) capacitor c=100.0f

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liletian

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Re: MLIN simulation question in RFDE
Reply #20 - Apr 28^th, 2010, 8:53am

(3) As workaround, don't place "adsLib/MSUB" in schematic.
Instead include netlist scratch for "MSUB".
It is easily available in ADS native environment.
How to do the netlist? It looks like RFDE does not generate the netlist for me.

(4) Use Agilent GoldenGate.
I rarely use GoldenGate and just give it a try. It reported the same errors.

pancho_hideboo wrote on Apr 28^th, 2010, 8:29am:

The followings are netlist sets for RFDE(ADSsim).

"test_TL_filter.ads" Quote:

simulator lang=ads
Options ResourceUsage=yes Verbose=yes UseNutmegFormat=no�TopDesignName="data"

; Generated by: DFII version 5.10.41.500.5.98 (using OASIS direct)

#include "~/RFDE/msub1.ads"

MLIN2:I4 net06 net7 Subst="MSub1" W=250.00u L=5m Wall1=1e+30 Wall2=1e+30 Mod=1

simulator lang=spectre
PORT1 (net06 0) port r=50 num=1 type=dc
PORT2 (net7 0) port r=10M num=2 type=dc
C0 (net7 0) capacitor c=100.0f

simulator lang=ads
Options:Options1 Temp=25.0 Tnom=27 TopologyCheck=yes GiveAllWarnings=yes�MaxWarnings=10

S_Param:SP1 SweepVar="freq" SweepPlan="SP1_stim" CalcS=yes StatusLevel=2 \
� �CalcNoise=no OutputPlan[1]="GlobalOutputPlan" OutputPlan[2]="GlobalInhibitPlan"

SweepPlan:SP1_stim Sort=yes Start=1k Stop=10G Dec=21

OutputPlan:GlobalOutputPlan Type="Output" UseBuiltinRule=no \
� �OverrideInhibitRule=no UseNodeNestLevel=yes NodeNestLevel=2 \
� �UseCurrentNestLevel=yes CurrentNestLevel=999 \
� �UseDeviceCurrentNestLevel=no

OutputPlan:GlobalInhibitPlan Type="Inhibit" UseBuiltinRule=no \
� �OverrideInhibitRule=no NodeRegExpr[1]="\.net[0-9]+$|^net[0-9]+$"

mapping {
�pinMapping {
� �capacitor 1:"PLUS" 2:"MINUS"
� �port 1:"PLUS" 2:"MINUS"
� �MLIN2 1:"P1" 2:"P2"
�}
}

"msub1.ads" Quote:

simulator lang=ads
model MSub1 MSUB H=10.0u Er=9.6 Mur=1 Cond=1e+50 Hu=1e+36 T=0 TanD=0 Rough=0

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Screenshot_006.png

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pancho_hideboo

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Re: MLIN simulation question in RFDE
Reply #21 - Apr 28^th, 2010, 8:55am

liletian wrote on Apr 28^th, 2010, 8:53am:

I rarely use GoldenGate and just give it a try.
It reported the same errors.

Use "adsLib" for GoldenGate not for RFDE.

liletian wrote on Apr 28^th, 2010, 8:53am:

How to do the netlist? It looks like RFDE does not generate the netlist for me.

It is same as Cadence spectre's netlisting in Cadence ADE.
Do you understand Cadence ADE ?

About netlisting in ADS native environment, see http://www.designers-guide.org/Forum/YaBB.pl?num=1265191125/7#7

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http://www.youtube.com/watch?v=mjIxGh55bMM&feature=related

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liletian

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Re: MLIN simulation question in RFDE
Reply #22 - Apr 28^th, 2010, 8:59am

how to use this file?
can you please give me the totally directory of the RFDE ADS, so I can have a look?
thanks
pancho_hideboo wrote on Apr 28^th, 2010, 8:29am:

The followings are netlist sets for RFDE(ADSsim).

"test_TL_filter.ads" Quote:

simulator lang=ads
Options ResourceUsage=yes Verbose=yes UseNutmegFormat=no�TopDesignName="data"

; Generated by: DFII version 5.10.41.500.5.98 (using OASIS direct)

#include "~/RFDE/msub1.ads"

MLIN2:I4 net06 net7 Subst="MSub1" W=250.00u L=5m Wall1=1e+30 Wall2=1e+30 Mod=1

simulator lang=spectre
PORT1 (net06 0) port r=50 num=1 type=dc
PORT2 (net7 0) port r=10M num=2 type=dc
C0 (net7 0) capacitor c=100.0f

simulator lang=ads
Options:Options1 Temp=25.0 Tnom=27 TopologyCheck=yes GiveAllWarnings=yes�MaxWarnings=10

S_Param:SP1 SweepVar="freq" SweepPlan="SP1_stim" CalcS=yes StatusLevel=2 \
� �CalcNoise=no OutputPlan[1]="GlobalOutputPlan" OutputPlan[2]="GlobalInhibitPlan"

SweepPlan:SP1_stim Sort=yes Start=1k Stop=10G Dec=21

OutputPlan:GlobalOutputPlan Type="Output" UseBuiltinRule=no \
� �OverrideInhibitRule=no UseNodeNestLevel=yes NodeNestLevel=2 \
� �UseCurrentNestLevel=yes CurrentNestLevel=999 \
� �UseDeviceCurrentNestLevel=no

OutputPlan:GlobalInhibitPlan Type="Inhibit" UseBuiltinRule=no \
� �OverrideInhibitRule=no NodeRegExpr[1]="\.net[0-9]+$|^net[0-9]+$"

mapping {
�pinMapping {
� �capacitor 1:"PLUS" 2:"MINUS"
� �port 1:"PLUS" 2:"MINUS"
� �MLIN2 1:"P1" 2:"P2"
�}
}

"msub1.ads" Quote:

simulator lang=ads
model MSub1 MSUB H=10.0u Er=9.6 Mur=1 Cond=1e+50 Hu=1e+36 T=0 TanD=0 Rough=0

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pancho_hideboo Senior Fellow Offline Posts: 1424 Real Homeless	Re: MLIN simulation question in RFDE Reply #23 - Apr 28^th, 2010, 9:00am Read all documenations of Agilent RFDE and Cadence ADE. liletian wrote on Apr 28^th, 2010, 8:59am: how to use this file? Include "msub1.ads" just same as transistor model file. Again do you understand Cadence ADE ?
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liletian

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Re: MLIN simulation question in RFDE
Reply #24 - Apr 28^th, 2010, 9:01am

My understanding is Goldsden gate is only a simulator under RFDE. Again, I do not know much on Golden Gate.

pancho_hideboo wrote on Apr 28^th, 2010, 8:55am:

liletian wrote on Apr 28^th, 2010, 8:53am:

I rarely use GoldenGate and just give it a try.
It reported the same errors.

Use "adsLib" for GoldenGate not for RFDE.

liletian wrote on Apr 28^th, 2010, 8:53am:

How to do the netlist? It looks like RFDE does not generate the netlist for me.

It is same as Cadence spectre's netlisting in Cadence ADE.
Do you understand Cadence ADE ?

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liletian

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Re: MLIN simulation question in RFDE
Reply #25 - Apr 28^th, 2010, 9:03am

pancho_hideboo wrote on Apr 28^th, 2010, 8:55am:

liletian wrote on Apr 28^th, 2010, 8:53am:

I rarely use GoldenGate and just give it a try.
It reported the same errors.

Use "adsLib" for GoldenGate not for RFDE.

liletian wrote on Apr 28^th, 2010, 8:53am:

How to do the netlist? It looks like RFDE does not generate the netlist for me.

It is same as Cadence spectre's netlisting in Cadence ADE.
Do you understand Cadence ADE ?

no, I do not know how to do it. can you tell me how to use it?
Thanks

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pancho_hideboo Senior Fellow Offline Posts: 1424 Real Homeless	Re: MLIN simulation question in RFDE Reply #26 - Apr 28^th, 2010, 9:03am liletian wrote on Apr 28^th, 2010, 9:01am: My understanding is Goldsden gate is only a simulator under RFDE. Not correct. http://www.designers-guide.org/Forum/YaBB.pl?num=1268404959/7#7 I'm not kind and patient enough for answering such too basic questions.
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liletian

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Re: MLIN simulation question in RFDE
Reply #27 - Apr 28^th, 2010, 9:18am

pancho_hideboo wrote on Apr 28^th, 2010, 9:03am:

liletian wrote on Apr 28^th, 2010, 9:01am:

My understanding is Goldsden gate is only a simulator under RFDE.

Not correct.
http://www.designers-guide.org/Forum/YaBB.pl?num=1268404959/7#7

I'm not kind and patient enough for answering such too basic questions.

It is fine. I do not really need to know what golden Gate is?
If you can tell me how to use the netlist you showed to me in ADS, I will greatly appreciate your help.
Otherwise, thank you anyway for your help.

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pancho_hideboo

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Re: MLIN simulation question in RFDE
Reply #28 - Apr 28^th, 2010, 9:23am

liletian wrote on Apr 28^th, 2010, 9:18am:

It is fine. I do not really need to know what golden Gate is?

I don't think you can manage to use�Agilent GoldenGate, if I judge from all your previous posts in both "this forum" and "http://www.edaboard.com/forum63.html".

liletian wrote on Apr 28^th, 2010, 9:18am:

If you can tell me how to use the netlist you showed to me in ADS, I will greatly appreciate your help.

Again see http://www.designers-guide.org/Forum/YaBB.pl?num=1272383469/23#23.

Simply include "msub1.ads" just same as transistor model file including when you use Spectre in Cadence ADE.

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liletian

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Re: MLIN simulation question in RFDE
Reply #29 - Apr 28^th, 2010, 9:49am

pancho_hideboo wrote on Apr 28^th, 2010, 9:23am:

liletian wrote on Apr 28^th, 2010, 9:18am:

It is fine. I do not really need to know what golden Gate is?

I don't think you can manage to use�Agilent GoldenGate, if I judge from all your previous posts in both "this forum" and "http://www.edaboard.com/forum63.html".

liletian wrote on Apr 28^th, 2010, 9:18am:

If you can tell me how to use the netlist you showed to me in ADS, I will greatly appreciate your help.

Again see http://www.designers-guide.org/Forum/YaBB.pl?num=1272383469/23#23.

Simply include "msub1.ads" just same as transistor model file including when you use Spectre in Cadence ADE.

whatever you say, thank you for your help. I finally got it to work.
Thanks a lot!

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